This invention relates to a semiconductor device and a technique for producing a semiconductor device, and in particular to an effective technique for producing a semiconductor device by stacking two semiconductor chips, and sealing them by a single resin body.
With the trend towards larger capacities, semiconductor chips which incorporate storage systems such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory) are assuming larger flat sizes. In semiconductor devices wherein a semiconductor chip containing a storage circuit system is sealed by a resin body, a lead frame diepad (known also as a tab) is omitted, and a LOC (Lead on Chip) structure is used which can also be applied to large semiconductor chips. In an LOC structure, leads are disposed on the upper surface (i.e., a main surface) of upper and lower surfaces (a main surface and another main surface opposite to it) of a semiconductor chip. By adopting this LOC structure, a seal region can be retained for leads sealed by a resin body even when the flat size of the semiconductor chip increases, so increased flat size of the resin body is suppressed. A semiconductor device using an LOC structure is disclosed, for example, in Tokkai Hei 2-246125 published on Oct. 1, 1990 (corresponding to U.S. Pat. No. 5,068,712).
To achieve high packaging density of semiconductor chips comprising storage circuit systems, stacked semiconductor devices have been developed wherein two semiconductor chips having storage circuit systems of identical capacity are stacked, and the two chips are then sealed by one resin body. A stacked semiconductor device having an LOC structure is disclosed, for example, in Tokkai Hei 7-58281 (published on Mar. 3, 1995).
The stacked semiconductor device having an LOC structure disclosed in this publication essentially comprises a resin body, first and second semiconductor chips situated inside the resin body and having an electrode formed on a circuit-forming surface which is the upper surface (i.e., a main surface) of upper and lower surfaces (a main surface and another main surface opposite each other), a first lead extending inside and outside the resin body and bonded to the circuit-forming surface of the first semiconductor chip via an insulating film, and a second lead situated inside the resin body, bonded to the circuit-forming surface of the second semiconductor chip via an insulating film, and electrically connected to the electrode of the circuit-forming surface by an electrically conducting wire.
The first semiconductor chip and second semiconductor chip are both stacked so that their circuit-forming surfaces oppose each other leaving a predetermined gap. The first lead and second lead are laminated so that part of each is superimposed, and electrically and mechanically connected by welding with a laser.
The first lead comprises an inner lead part situated inside the resin body which runs across one side of the circuit-forming surface of the first semiconductor chip and extends over the circuit-forming surface of the first semiconductor chip, and an outer lead part bent into a J-shaped lead, which is one type of surface mounted packege.
The inner lead part of this first lead is bent so that the part which is bonded to the circuit-forming surface of the first semiconductor chip via an insulating film, is nearer to the circuit-forming surface of the chip than the part which runs across one side of the first semiconductor chip.
The second lead runs across one side of the circuit-forming surface of the second semiconductor chip and extends over the circuit-forming surface of the second semiconductor chip. This lead is bent so that the part which is bonded to the circuit-forming surface of the second semiconductor chip via an insulating film, is nearer to the circuit-forming surface of the chip than the part which runs across one side of the second semiconductor chip.
After welding with the laser, the other end of the second lead connected to the second semiconductor chip is cut inside the resin body before the transfer mold step, so it is not pulled out from the body. In other words, the outer lead which is pulled out of the body is used as a common outer connecting terminal for two semiconductor chips.
According to the aforesaid resin molded type semiconductor device, two semiconductor chips forming a memory LSI may be resin-sealed into one thin package, so a high-capacity package having effectively twice the storage capacity can be implemented in the same size as a package comprising one semiconductor chip which has been resin-sealed.
The inventor is developing a new stacked semiconductor device having an LOC structure suitable for thinner assemblies. This stacked semiconductor device has not yet been disclosed, however, it has the following construction as described in U.S. application Ser. No. 09/161,725 (filed on Sep. 29, 1998) submitted earlier by the Applicant.
The device comprises mainly a resin body, a first and second semiconductor chips situated inside the resin body and having an electrode formed on a circuit-forming surface which is the upper surface (i.e., a main surface) of upper and lower surfaces, a first lead extending inside and outside the resin body, bonded to the circuit-forming surface of the first semiconductor chip via an insulating film, and electrically connected to the electrode of the circuit-forming surface by an electrically conducting wire, and a second lead extending inside and outside the resin body, bonded to the circuit-forming surface of the second semiconductor chip via an insulating film, and electrically connected to the electrode of the circuit-forming surface by an electrically conducting wire.
The stacked semiconductor device of this invention may be, for example, a TSOP (Thin Small Outline Package). Two semiconductor chips, i.e., first and second semiconductor chips, which form memory LSI having the same storage capacities (e.g., a 64 Mbyte DRAM), are stacked on each other inside a package (resin body) formed by the transfer mold method, and are sealed with their lower surfaces (i.e., a main surface and another main surface facing away from each other) in contact.
The first lead and second lead are laminated so that part of each is superimposed, and electrically and mechanically connected by welding with a laser.
The first lead and second lead each comprise an inner lead part situated inside the resin body and an outer lead part situated outside the resin body. The inner lead parts of the first and second semiconductor chips comprise a first part which runs across one side of the circuit-forming surface of the semiconductor chip (first semiconductor chip in the case of the first lead and second semiconductor chip in the case of the second lead) and extends over the circuit-forming surface of the semiconductor chip, a second part which is bent from the first part towards the lower surface of the semiconductor chip, and a third part which extends from the second part in the same direction as the first part. The third parts of the first lead and second lead extend inside and outside the resin body, and are stacked on each other in an up/down direction. The outer lead part of the first lead is bent in a gull-wing lead shape, which is a type of surface mounted package. The outer lead part of the second lead is formed in a shorter length than that of the outer lead part of the first lead.
Hence, in the above stacked semiconductor device, unlike the stacked semiconductor device of the aforesaid disclosure wherein element forming surfaces of two semiconductor chips are disposed opposing each other and an inner lead part is disposed in the gap between the two, the lower surfaces of two semiconductor chips are brought into contact with each other.
Therefore there is no gap between the two semiconductor chips, and the thickness of the resin body can be made thinner by a corresponding amount.
In other words, as there are no first leads or second leads between the first semiconductor chip and second semiconductor chip, the space between the two semiconductor chips can be made narrower compared to the case when the first lead and second lead are respectively disposed between the first semiconductor chip and second semiconductor chip as in a prior art stacked semiconductor device. Consequently, the thickness of the resin body can be reduced, and the stacked semiconductor device can be made thinner.
Regarding the floating capacitance between the semiconductor chips and leads, the floating capacitance between the leads disposed on the element-forming surface of the first semiconductor chip and the second semiconductor chip, and the floating capacitance between the leads disposed on the element-forming surface of the second semiconductor chip and the first semiconductor chip, are both eliminated, hence the floating capacitance applied to the leads is reduced by a corresponding amount and the signal propagation delay of the leads is improved.
In other words, as there is no first lead and second lead between the first semiconductor chip and second semiconductor chip, of the floating capacitances applied to the first lead (chip/lead capacitance), the floating capacitance produced by the second semiconductor chip is effectively eliminated compared to the case when the first lead and second lead are disposed between the first semiconductor chip and second semiconductor chip as in the prior art stacked semiconductor device, and of the floating capacitances applied to the second lead (chip/lead capacitance), the floating capacitance produced by the first semiconductor chip is effectively eliminated. Hence, the floating capacitance applied to the leads, i.e., the first lead and second lead, is reduced. As a result, the signal propagation delay of the leads is improved, and the electrical characteristics of the stacked semiconductor device are enhanced.
The first semiconductor chip is sealed by a resin fixed by the lead of the first lead frame, and the second semiconductor chip is sealed by a resin body fixed by the lead of the second lead frame. In other words, this resin-sealed semiconductor device is produced using two lead frames. Of these two lead frames, one of them does not have an outer lead part and has only an inner lead part. In other words, in this resin-sealed semiconductor device, the outer lead part of the other lead frame pulled out from the resin body is used as a common external connecting terminal for two semiconductor chips.
In the steps for producing this resin-sealed semiconductor device, the inner lead part of the lead of the first lead frame is first bonded to the element-forming surface of the first semiconductor chip, and the inner lead part of the lead of the second lead frame is bonded to the element-forming surface of the second semiconductor chip.
Next, the inner lead part of the lead of the first lead frame and a bonding pad formed on the element-forming surface of the first semiconductor chip are connected by wires, the inner lead part of the lead of the second lead frame and a bonding pad formed on the element-forming surface of the second semiconductor chip are connected by wires, the two lead frames are superimposed such that the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip are facing each other, these lead frames are pressed into a mold, and the first semiconductor chip and second semiconductor chip are sealed by a resin.
Next, a first lead frame dam bar and a second lead frame dam bar extending outside the package (resin body) are cut using a cutting die to form the outer lead parts of one lead frame.
According to the above method of production, the cutting of the two lead frames can be performed in one step, so the process can be shortened compared to the method of producing a package in the aforesaid disclosure where the outer lead part of one lead frame is cut before the mold step.
[1] However, in the above production method, two lead frames carrying a semiconductor chip are superimposed, inserted in a mold, and resin is injected into the mold cavity with one lead frame dam bar and the other lead frame dam bar clamped in an up/down direction by an upper clamp surface and a lower clamp surface. If the upper and lower mold clamp surfaces do not tighten the dam bar with sufficient force, one of the dam bars may displace towards the outside of the cavity due to the resin injection pressure, resin may leak outside the cavity through the gap which is then produced between one dam bar and the other dam bar, and this may cause molding defects.
In particular, in recent LSI lead frames, as the width and pitch of the lead are finer, the width of the dam bars is also narrower. As a result, it is difficult to ensure sufficient contact surface area between the clamp surfaces of the mold and the dam bars, so the tightening force of the clamp surfaces on the dam bars is insufficient, and the dam bars tend to displace due to the resin injection pressure.
One way of dealing with this problem might be to increase the width of the dam bars of the lead frames, but if this is done in the above production process where two superimposed dam bars are cut simultaneously, the load on the cutting mold increases, and its lifetime is reduced.
Further, the inventor discovered other problems in the course of developing the aforesaid stacked semiconductor device.
[2] This stacked semiconductor device is produced by an assembly process using two lead frames, therefore it is necessary to join the first lead supported in the first lead frame and the second lead supported in the second lead frame. Laser welding, which is suitable for micro-assembly, may effectively be used to join the first and second leads, however the following problems arise if laser welding is performed in the stage before forming the resin sealing body.
In laser welding, the join parts (weld parts) of the leads are irradiated by laser light and melted, so a large amount of molten material is scattered in the surrounding area by the laser irradiation. As the first semiconductor chip and second semiconductor chip are stacked with their lower surfaces facing each other, the scattered material produced by this melting flies onto the circuit-forming surfaces of the semiconductor chips.
When scattered material flies onto the circuit-forming surfaces of the semiconductor chips, since this material is at high temperature, it causes heat damage in the protective film formed on the circuit-forming surface of the semiconductor chips, so the interconnections underneath the protective film often break or short circuits are caused in adjacent interconnections. If a large number of such defects occur, a semiconductor chip becomes defective, and the yield of the stacked semiconductor device seriously declines. In particular, in semiconductor chips where the protecting film is formed of a polyimide resin to improve adhesion properties with the resin of the resin sealing body or the alpha ray resistance of DRAM, defects due to scattered material occur very easily.
Further, as the join parts of the leads are melted by laser welding, impurities contained in the leads (e.g., sulfur) become outer gases, adhere to the semiconductor chip surface, and cause chemical reactions which lead to the deterioration of the chip surface. If deterioration of the semiconductor chip surface occurs, the adhesion between the semiconductor chip and the resin of the resin body decreases remarkably, and peeling easily occurs at the interface between the two due to the thermal stress caused by the difference of thermal expansion coefficients. If this interface peeling should occur, moisture contained in the resin of the resin body accumulates in the peeling area, and the accumulated moisture may vaporize during a heat cycle test, which is an environmental test performed after the product is finished, or due to solder reflow heat when the chip is soldered to a circuit board. This causes cracks in the resin body, and leads to a decreased reliability of the stacked semiconductor device.
Further, lead frames are tending to become thinner as leads become finer, and warp in the leads occurs more easily due to mechanical strength insufficiency. If the leads become warped, a gap will occur between the join part of the first lead and the join part of the second lead causing solder defects. As a result the first lead and second lead must be restrained by a fixing tool, and productivity of the stacked semiconductor device decreases.
[3] In stacked semiconductor devices and also in ordinary semiconductor devices, to maintain solder leak properties during installation and to improve anticorrosion properties, outer leads must be plated with an electrically conducting film (plating film) comprising, for example, lead (Pb)-tin (Sn). This plating is generally electroplating comprising pre-processing such as a degreasing step, water rinsing step, polishing step and water rinsing step, and post processing such as a plating step, water rinsing step, neutralizing step, hot water rinsing step, and drying step. When plating is applied by electroplating comprising these steps, in a stacked semiconductor device, the plating is carried out with the two lead frames superimposed. Therefore, some processing fluid (reagent) from a previous stage is caught between the first lead frame and second lead frame due to capillary action, and a large amount of the processing fluid from the previous stage maybe carried over into processing fluids of subsequent stages. This carrying-over of processing fluid from a previous stage causes plating defects, and greatly reduces the yield of the stacked semiconductor device. Also, the processing fluid of subsequent stages must frequently be replaced, and productivity of the stacked semiconductor device declines.
[4] In the stacked semiconductor device, the resin sealed body is formed with two lead frames superimposed. Trailing leads for supporting the resin body in the lead frame are also formed in each of the two lead frames in such a position that they are superimposed.
Therefore, there are two adjacent surfaces of trailing leads inside the resin body, and as the two trailing leads are cut from the frame body of the lead frame after plating is carried out, the ends of the adjacent leads are left exposed from the resin body. If these adjacent surfaces are left exposed, moisture from outside easily penetrates the interior of the body through the surfaces, and easily corrodes the connecting parts between the electrodes and wires of the semiconductor chip, and the connecting parts between the inner lead parts of the leads and wires. This leads to decreased reliability of the stacked semiconductor chip.
[5] Stacked semiconductor devices are produced by an assembly process using two lead frames. In the first lead frame, the tips of the outer lead parts of first leads are supported in the frame body, and the intermediate parts of first leads are interconnected by dam bars and supported in the frame body by dam bars. In the second lead frame, the tips of the outer lead parts of second leads are interconnected by dam bars, and supported in the frame body by dam bars. In other words, in the second lead frame, there is nothing supported in the area specified by the dam bars and frame body, so rigidity is low and bending occurs easily. Therefore, when the second lead frame is transported in a step at a subsequent stage after fixing the inner lead parts of the second leads to the circuit-forming surface of the semiconductor chip, the chip tends to wobble and easily fall off the second lead frame, so yield of the stacked semiconductor device declines.
[6] In stacked semiconductor devices, the resin sealing body is formed by the transfer molding method which is suitable for mass production. The transfer molding method is a method for forming a resin body by pressure-injecting a resin into a mold cavity. The resin is generally an epoxy heat curing resin containing a large number of fillers to achieve lower stresses.
A semiconductor chip essentially comprises a semiconductor substrate, an insulating layer on a circuit-forming surface of this semiconductor substrate, a multi-layer interconnection layer comprising plural interconnection layers laminated on each other, and a surface protective film (final protective film) formed so as to cover this multi-layer interconnection layer, therefore the semiconductor chip is warped in a direction in which the lower surface of the chip bulges outwards. If two semiconductor chips are stacked with their lower surfaces facing each other in this state, a gap 172 will be formed between two semiconductor chips 171 which gradually widens from the center to the edges of the two semiconductor chips 171, as shown in FIG. 57.
Therefore, when the two semiconductor chips 171 and 171 are disposed in a cavity 176 of a mold 175, and a resin 177 is pressure-injected into the cavity 176 to form a resin body as shown in FIG. 58, the resin 177 permeates the gap between the two semiconductor chips 171. However, as the resin 177 contains fillers which are mixed with it, it cannot penetrate a gap which is narrower than the particle diameter of the fillers, so a space 178 is formed between the two semiconductor chips 171. If such a space 178 is formed between the two semiconductor chips 171, when a higher pressure than the injection pressure is used to remove bubbles enclosed in the resin after resin injection into the cavity 176 is completed, cracks will occur in the semiconductor chip 171 radiating out from the space 178, and this leads to a decrease in yield of the stacked semiconductor device.
It is therefore an object of this invention to provide a technique capable of improving the yield of a semiconductor device.
It is a further object of this invention to provide a technique capable of improving the productivity of a semiconductor device.
It is yet another object of this invention to provide a technique capable of improving the reliability of a semiconductor device.
It is yet another object of this invention to provide a technique for preventing displacement of a dam bar due to a resin injection pressure during molding, in the production a semiconductor device wherein two semiconductor chips are resin-sealed using two lead frames.
These and other aims and novel features of the present invention it will become apparent from the following detailed description and attached drawings.
The essential features of the invention disclosed in the present application will now be simply described.
[1] In the semiconductor device according to this invention, the lower surface of a first semiconductor chip and the lower surface of a second semiconductor chip are sealed in a package, wherein the inner lead parts of plural leads of a first lead frame fixed on the element-forming surface of the first semiconductor chip and a bonding pad formed on the element-forming surface of the first semiconductor chip, and the inner lead parts of plural leads of a second lead frame fixed on the element-forming surface of the second semiconductor chip and a bonding pad formed on the element-forming surface of the second semiconductor chip, are respectively electrically connected, and the width of a dam bar of the second lead frame exposed outside the package is less than the width of a dam bar of the first lead frame exposed outside the package.
[2] The method of producing a semiconductor device according to this invention comprises the following steps (a)-(d):
(a) providing a first lead frame comprising plural leads interconnected by a first dam bar, and providing a second lead frame comprising plural leads interconnected by a second dam bar, wherein a dummy lead extending in the width direction is formed in the second dam bar,
(b) fixing an inner lead part of a lead of the first lead frame on an element-forming surface of the first semiconductor chip, and fixing an inner lead part of a lead of the second lead frame on an element-forming surface of the second semiconductor chip,
(c) electrically connecting the inner lead part of the lead of the first lead frame and a bonding pad formed on the element-forming surface of the first semiconductor chip, and electrically connecting the inner lead part of the lead of the second lead frame and a bonding pad formed on the element-forming surface of the second semiconductor chip,
(d) sealing the first semiconductor chip and second semiconductor chip in the package with the first lead frame and second lead frame superimposed such that the lower surface of the first semiconductor chip and lower surface of the second semiconductor chip are facing each other, and
(e) cutting the first dam bar of the first lead frame and cutting the second dam bar of the second lead frame exposed outside the package.
[3] In the method of producing the semiconductor device, which comprises a resin body, a first semiconductor chip and second semiconductor chip situated inside the resin sealing body and having an electrode formed on the upper surfaces of upper and lower surfaces, a first lead extending inside and outside the resin body and electrically connected to the electrode of the first semiconductor chip, and a second lead extending inside and outside the resin body and electrically connected to the electrode of the second semiconductor chip, the first lead and second lead are joined by welding after forming the resin body with the weld parts of the first lead and second lead superimposed.
The welding is performed by laser light from above either of the first lead or second lead.
[4] In the method of producing a semiconductor device, comprising a step for sealing the inner lead part of the first lead supported in the frame body of the first lead frame, the inner lead part of the second lead supported in the frame body of the second lead frame, the first semiconductor chip bonded to the inner lead part of the first lead and having an electrode electrically connected to the inner lead part of the first lead, and the second semiconductor chip bonded to the inner lead part of the second lead and having an electrode electrically connected to the inner lead part of the second lead, by a resin body, and further comprising a step for plating the outer lead parts of the first lead and second lead,
the frame body of the second lead frame is removed after sealing with the resin and prior to plating.
[5] The method of producing a semiconductor device comprises the following steps:
preparing the first semiconductor chip and second semiconductor chip having an electrode formed on the upper surface of upper and lower surfaces,
preparing a first lead frame comprising plural first leads situated in a region surrounded by the first frame body, wherein the ends of the outer lead parts are supported in the first frame body, and the intermediate parts are interconnected by the first dam bar and supported in the first frame body by the first dam bar, and comprising a trailing lead situated in a region surrounded by the first frame body and supported in the first frame body, preparing a second lead frame comprising plural second leads situated in a region surrounded by the second frame body, wherein the ends of the outer lead parts are interconnected by the second dam bar and supported in the second frame body by the second dam bar,
bonding the inner lead parts of the first leads to the upper surface of the first semiconductor chip, and bonding the inner lead parts of the second leads to the upper surface of the second semiconductor chip,
electrically connecting an electrode of the first semiconductor chip to the inner lead parts of the first leads by an electrically conducting wire, and electrically connecting an electrode of the second semiconductor chip to the inner lead parts of the second leads by an electrically conducting wire, and
sealing the first semiconductor chip, second semiconductor chip, inner lead parts of the first leads, inner lead parts of the second leads, first electrically conducting wire, second electrically conducting wire and trailing lead by a resin body with the first lead frame and second lead frame superimposed such that the lower surfaces of the first semiconductor chip and second semiconductor chip are facing each other.
[6] The method of producing a semiconductor device comprises the following steps:
preparing the first semiconductor chip and second semiconductor chip having an electrode formed on the upper surface of upper and lower surfaces,
preparing a first lead frame comprising plural first leads situated in a region surrounded by the first frame body, wherein the ends of the outer lead parts are supported in the first frame body, and the intermediate parts are interconnected by the first dam bar and supported in the first frame body by the first dam bar, preparing a second lead frame comprising plural second leads situated in a region surrounded in the second frame body, wherein the ends of the outer lead parts are interconnected by the second dam bar and supported in the second frame body by the second dam bar, and comprising a reinforcing lead situated in a region surrounded by the second frame body, and supported by the second dam bar and second frame body,
bonding the inner lead parts of the first leads to the upper surface of the first semiconductor chip, and
bonding the inner lead parts of the second leads to the upper surface of the second semiconductor chip,
electrically connecting an electrode of the first semiconductor chip to the inner lead parts of the first leads by an electrically conducting wire, and electrically connecting an electrode of the second semiconductor chip to the inner lead parts of the second leads by an electrically conducting wire, and
sealing the first semiconductor chip, second semiconductor chip, inner lead parts of the first leads, inner lead parts of the second leads, first electrically conducting wire and second electrically conducting wire by a resin body with the first lead frame and second lead frame superimposed such that the lower surfaces of the first semiconductor chip and second semiconductor chip are facing each other.
[7] In the method of producing a semiconductor device, comprising a resin body formed by a large number of fillers, first semiconductor chip and second semiconductor chip having an electrode formed on the upper surface of upper and lower surfaces, first lead extending inside and outside the resin body and electrically connected to the first semiconductor chip, second lead extending inside and outside the resin body and electrically connected to the second semiconductor chip, the first semiconductor chip and second semiconductor chip being laminated with their lower surfaces facing each other,
the first semiconductor chip, second semiconductor chip, inner lead part of the first lead, inner lead part of the second lead, first electrically conducting wire and second electrically conducting wire are disposed inside the cavity of a mold with a damping material filled between the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip, and a resin is pressure injected into the cavity to form the resin body
[8] In the method of producing a semiconductor device, comprising a resin body formed by a large number of fillers, first semiconductor chip and second semiconductor chip having an electrode formed on the upper surface of upper and lower surfaces, first lead extending inside and outside the resin body and electrically connected to the first semiconductor chip, second lead extending inside and outside the resin body and electrically connected to the second semiconductor chip, the first semiconductor chip and second semiconductor chip being laminated with their lower surfaces facing each other,
the first semiconductor chip, second semiconductor chip, inner lead part of the first lead and inner lead part of the second lead are disposed inside the cavity of a mold leaving a gap wider than the maximum particle diameter of the fillers between the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip, and the resin is pressure-injected into the cavity to form the resin sealing body.
In the aforesaid means [1], [2], mold defects wherein resin leaks outside the cavity due to deformation of the dam bars as a result of pressure injection of the resin, are definitively prevented, so production yield of the semiconductor device using two lead frames is improved. The life of the mold is also lengthened.
The width of the dam bar can also be made narrower, so stress in the dam bar cutting mold is reduced, and its life is lengthened. Further, as the surface area of the cut surface of the dam bar is smaller, the amount of cut burrs and the amount of solder plating scrap can be reduced, so reliability of the semiconductor device using two lead frames is improved.
According to the aforesaid means [3], the upper surfaces (circuit-forming surfaces) of the first semiconductor chip and second semiconductor chip are covered by resin when the first lead and second lead are welded, so defects of the first semiconductor chip and second semiconductor chip due to scattering of material (high temperature molten material) during welding are prevented. As a result, production yield of the semiconductor device is improved.
Further, as the upper surfaces (circuit-forming surfaces) of the first semiconductor chip and second semiconductor chip are covered by resin when the first lead and second lead are welded, surface deterioration of the first semiconductor chip and second semiconductor chip due to adhesion of out-gas (vapors of impurities, e.g., sulfur, contained in the leads) is prevented, and decrease of adhesive force between the semiconductor chip and resin body is suppressed. As a result, peeling at the interface between the two due to thermal stress caused by a difference of the heat expansion coefficients of the semiconductor chip and the resin body, buildup of moisture in the resin of the seal in the peeling area, and expansion of accumulated moisture upon vaporization due to solder reflow heat during thermal cycle tests which are environmental tests performed on the finished product or during soldering of components on the circuit board, leading to cracks in the resin, can be prevented, so the reliability of the semiconductor device is enhanced.
The join parts of the first lead and second lead are maintained close to each other by the resin body, so there is no need to restrain the first lead and second lead by a fixing tool. This leads to improved productivity of the semiconductor device.
According to the aforesaid means [4], when plating of the outer lead parts of the first and second leads is performed, the amount of processing fluid (reagent) carried over to subsequent stages from a previous stage can be reduced, so plating defects due to carrying over of processing fluid are suppressed. As a result, the production yield of the semiconductor device is improved.
Further, due to the lesser amount of processing fluid (reagent) carried over to subsequent stages from a previous stage, the number of times processing fluid has to be replaced in each of the subsequent stages is also reduced, and as a result, the production yield of the semiconductor device is improved.
According to the aforesaid means [5], as there are no adjacent surfaces due to two superimposed trailing leads inside the resin body, moisture does not penetrate the resin body from outside through adjacent surfaces, and corrosion of the contact between the electrodes of the semiconductor chip and wires, and of the contact between the inner lead parts of the leads and wires, is suppressed. Hence, reliability of the semiconductor device is enhanced.
According to the aforesaid means [6], the rigidity of the second lead frame is improved by the reinforcing lead, so wobbling of the semiconductor chip causing it to fall off from the second lead frame when the second lead frame is transported in a subsequent stage after bonding the inner lead part of the second lead frame to the circuit-forming surface of the semiconductor chip, is suppressed. As a result, the production yield of the semiconductor device is improved.
According to the aforesaid means [7], a damping material is filled between the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip, so resin does not penetrate the space between the lower surfaces of the semiconductor chips. As no space due to the fillers mixed in the resin is formed between the first semiconductor chip and second semiconductor chip, cracks in the first and second semiconductor chips which might originate from such a space when a pressure higher than the resin injection pressure is applied after injecting resin into the cavity to remove bubbles trapped in the resin, are prevented. As a result, the production yield of the semiconductor device is improved.
According to the aforesaid means [8], resin passes more easily between the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip when the resin body is formed, so no space due to the fillers mixed in the resin is formed between the lower surface of the first semiconductor chip and the lower surface of the second semiconductor chip. Therefore, cracks in the first and second semiconductor chips which might originate from such a space when a pressure higher than the resin injection pressure is applied after injecting resin into the cavity to remove bubbles trapped in the resin, are prevented, and as a result, the production yield of the semiconductor device is improved.